Intel S5520SC Specifikace Strana 91
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Hodnocené. / 5. Na základě hodnocení zákazníků
Intel® Workstation Board S5520SC TPS BIOS Setup Utility
Revision 1.7
Intel order number: E39530-010
77
Table 24. Setup Utility — Memory Configuration Screen Fields
Setup Item Options Help Text Comments
Total Memory Information only. The amount of memory
available in the system in the form of
installed DDR3 DIMMs in units of MB or GB.
Effective Memory Information only. The amount of memory
available to the operating system in MB or
GB.
The Effective Memory is the difference
between Total Physical Memory and the sum
of all memory reserved for internal usage,
RAS redundancy and SMRAM. This difference
includes the sum of all DDR3 DIMMs that
failed Memory BIST during POST, or were
disabled by the BIOS during memory
discovery phase in order to optimize memory
configuration.
Current Configuration Information only. Displays one of the
following:
– Independent Mode: System memory is
configured for optimal performance
and efficiency and no RAS is enabled.
– Mirror Mode: System memory is
configured for maximum reliability in
the form of memory mirroring.
Current Memory Speed Information only. Displays the speed the
memory is running at.
Memory RAS and
Performance
Configuration
Configure memory RAS
(Reliability, Availability, and
Serviceability) and view
current memory
performance information
and settings.
Select to configure the memory RAS and
performance. This takes the user to a
different screen.
DIMM_ XY Displays the state of each DIMM socket
present on the board. Each DIMM socket field
reflects one of the following possible states:
– Installed: There is a DDR3 DIMM
installed in this slot.
– Not Installed: There is no DDR3 DIMM
installed in this slot.
– Disabled: The DDR3 DIMM installed in
this slot was disabled by the BIOS to
optimize memory configuration.
– Failed: The DDR3 DIMM installed in this
slot is faulty/malfunctioning.
Note: X denotes the Channel Identifier and Y
denote the DIMM Identifier within the
Channel.
- Workstation Board S5520SC 1
- Revision History 2
- Disclaimers 3
- Table of Contents 4
- List of Figures 9
- Revision 1.7 10
- List of Tables 11
- 1. Introduction 15
- 2. Overview 16
- Overview 19
- 3. Functional Architecture 30
- 3.1 Intel 31
- 5520 I/O Hub (IOH) 31
- 3.2 Processor Support 32
- 3.2.3 Intel 34
- Technology (EIST) 34
- 3.3 Memory Subsystem 36
- 3.3.2 Supported Memory 38
- 3.3.5 Memory Interleaving 42
- 3.3.6 Memory Test 43
- 3.3.7 Memory Scrub Engine 43
- 3.3.8 Memory RAS 43
- Tables 5 and 6 47
- 3.4 ICH10R 49
- Revision 1.7 50
- 3.5 PCI Subsystem 52
- 3.6 Intel 53
- 3.6.1 SAS RAID Support 54
- 3.8 Serial Ports 57
- 3.9 Floppy Disk Controller 58
- 3.11 Video Support 58
- 3.11.1 Video Modes 59
- 3.11.2 Dual Video 59
- 3.13 Audio Codec 62
- 3.14 IEEE 1394a Support 63
- 3.15.1 Overview 64
- 3.15.2 TPM security BIOS 64
- 3.16 ACPI Support 67
- 3.17 Intel 67
- Virtualization Technology 67
- 4. Platform Management 68
- 4.2.3 Media Redirection 71
- 4.2.5 Embedded Web server 73
- 4.3 Platform Control 74
- 4.3.2 Fan Speed Control 75
- 4.4 Intel 78
- 5. BIOS Setup Utility 80
- 5.3.1 Operation 81
- 5.3.2.1 Main Screen 84
- 5.3.2.2.1 Processor Screen 87
- 5.3.2.2.2 Memory Screen 90
- 5.3.2.2.6 PCI Screen 98
- Revision 1.7 103
- 5.3.2.6 Boot Options Screen 108
- 6.2 Power Connectors 119
- 6.3.1 Intel 121
- RMM3) Connector 121
- 6.3.2 LCP/IPMB Header 121
- 6.4 Front Panel Connector 122
- 6.5 I/O Connectors 123
- 6.5.3 SAS Module Slot 124
- 6.5.5 USB Connector 125
- 6.5.6 IEEE 1394a connectors 127
- 6.6 Audio Connectors 128
- 6.7 Onboard Video Header 128
- 6.8 Fan Headers 129
- 7. Jumper Blocks 131
- 7.1.1 Clearing the CMOS 132
- 7.1.2 Clearing the Password 132
- 7.3 BIOS Recovery 133
- 8. Intel 135
- Light Guided Diagnostics 135
- 8.2 Fan Fault LEDs 136
- A. System Status LED 137
- B. System ID LED 137
- 8.4 DIMM Fault LEDs 139
- 9.1 Intel 141
- 9.2 MTBF 141
- Table 76. MTBF Estimate 142
- Revision 1.7 144
- 9.4.1 Grounding 145
- 9.4.2 Stand-by Outputs 146
- 9.4.3 Remote Sense 146
- 9.4.4 Voltage Regulation 146
- 9.4.5 Dynamic Loading 147
- 9.4.6 Capacitive Loading 147
- 9.4.7 Ripple/Noise 147
- 9.4.8 Timing Requirements 148
- Table 84. Turn On/Off Timing 149
- FCC (USA) 153
- ICES-003 (Canada) 155
- VCCI (Japan) 155
- BSMI (Taiwan) 155
- RRL KCC (Korea) 156
- 10.7 CA Perchlorate Warning 159
- Appendix B: Compatible Intel 162
- Server Chassis 162
- POST Error Beep Codes 185
- Glossary 188
- Reference Documents 192
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