
Intel® Workstation Board S5520SC TPS Design and Environmental Specifications
Revision 1.7
Intel order number: E39530-010
133
9.4.5 Dynamic Loading
The output voltages remain within limits for the step loading and capacitive loading specified in
the following table. You should test the load transient repetition rate between 50 Hz and 5 kHz
at duty cycles ranging from 10% to 90%. The load transient repetition rate is only a test
specification. The Δ step load may occur anywhere within the minimum load to the maximum
load range.
Table 80. Transient Load Requirements
Output Δ Step Load Size 1 Load Slew Rate Test Capacitive Load
+3.3 V 7.0 A 0.25A/μsec 4700μF
+5 V 7.0 A 0.25A/μsec 1000μF
+12 V 25 A 0.25A/μsec 4700μF
+5 VSB 0.5 A 0.25A/μsec 20μF
1. Step loads on each 12 V output may happen simultaneously.
9.4.6 Capacitive Loading
The power supply should be stable and meet all requirements within the following capacitive
loading range.
Table 81. Capacitive Loading Conditions
Output Minimum Maximum Units
+3.3V 250 6800 μF
+5V 400 4700 μF
+12V1, +12V2, +12V3, +12V4 500 each 11,000 μF
-12V 1 350 μF
+5VSB 20 350 μF
9.4.7 Ripple/Noise
The maximum allowed ripple/noise output of the power supply is defined in the following table.
This is measured over a bandwidth of 0 Hz to 20 MHz at the power supply output connectors. A
10 μF tantalum capacitor in parallel with a 0.1 μF ceramic capacitor are placed at the point of
measurement.
Table 82. Ripple and Noise
+3.3V +5V +12V1, +12V2, +12V3, +12V4 -12V +5 VSB
50 mVp-p 50 mVp-p 120 mVp-p 120 mVp-p 50 mVp-p
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