Intel LE80537GF0414M Datový list stáhnout pdf (Strana 66)

Errata

66 Specification Update

AH60. LBR, BTS, BTM May Report a Wrong Address When an

Exception/Interrupt Occurs in 64-bit Mode

Problem: An exception/interrupt event should be transparent to the LBR (Last Branch Record),

BTS (Branch Trace Store) and BTM (Branch Trace Message) mechanisms. However,

during a specific boundary condition where the exception/interrupt occurs right after

the execution of an instruction at the lower canonical boundary (0x00007FFFFFFFFFFF)

in 64-bit mode, the LBR return registers will save a wrong return address with bits 63

to 48 incorrectly sign extended to all 1‟s. Subsequent BTS and BTM operations which

report the LBR will also be incorrect.

Implication: LBR, BTS and BTM may report incorrect information in the event of an

exception/interrupt.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.

AH61. A Thermal Interrupt Is Not Generated When the Current Temperature

Is Invalid

Problem: When the DTS (Digital Thermal Sensor) crosses one of its programmed thresholds it

generates an interrupt and logs the event (IA32_THERM_STATUS MSR (019Ch) bits

[9, 7]). Due to this erratum, if the DTS reaches an invalid temperature (as indicated

IA32_THERM_STATUS MSR bit[31]) it does not generate an interrupt even if one of

the programmed thresholds is crossed and the corresponding log bits become set.

Implication: When the temperature reaches an invalid temperature the CPU does not generate a

Thermal interrupt even if a programmed threshold is crossed.

Workaround: None identified.

Status: For the steppings affected, see the Summary Tables of Changes.

AH62. CMPSB, LODSB, or SCASB in 64-bit Mode with Count Greater or Equal

to 2

May Terminate Early

Problem: In 64-bit Mode CMPSB, LODSB, or SCASB executed with a repeat prefix and count

greater than or equal to 2

may terminate early. Early termination may result in one

of the following.

 The last iteration not being executed

 Signaling of a canonical limit fault (#GP) on the last iteration

Implication: While in 64-bit mode, with count greater or equal to 2

, repeat string operations

CMPSB, LODSB or SCASB may terminate without completing the last iteration. Intel

has not observed this erratum with any commercially available software.

Workaround: Do not use repeated string operations with RCX greater than or equal to 2

Status: For the steppings affected, see the Summary Tables of Changes.

1 2 ... 61 62 63 64 65 66 67 68 69 70 71 ... 96 97

Žádné komentáře

Intel LE80537GF0414M Datový list Strana 66