Intel CL8064701528402 Datový list stáhnout pdf (Strana 71)

Datasheet 71

Electrical Specifications

7.5.3.1 PCI Express* DC Specifications

The processor DC specifications for the PCI Express* are available in the PCI Express

Base Specification, Revision 3.0. This document will provide only the processor

exceptions to the PCI Express Base Specification, Revision 3.0.

7.5.3.2 DMI2/PCI Express* DC Specifications

The processor DC specifications for the DMI2/PCI Express* are available in the PCI

Express Base Specification, Revisions 2.0 and 1.0. This document will provide only the

processor exceptions to the PCI Express Base Specification, Revisions 2.0 and 1.0.

7.5.3.3 Reset and Miscellaneous Signal DC Specifications

For a power-on Reset, RESET_N must stay active for at least 3.5 millisecond after V

and BCLK{0/1} have reached their proper specifications. RESET_N must not be kept

asserted for more than 100 ms while PWRGOOD is asserted. RESET_N must be held

asserted for at least 3.5 millisecond before it is de-asserted again. RESET_N must be

held asserted before PWRGOOD is asserted. This signal does not have on-die

termination and must be terminated on the system board.

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Intel CL8064701528402 Datový list Strana 71