Intel 2 Duo T7500 Datový list

Intel® Core™2 Duo Processors and Intel® Core™2 Extreme Processors for Platforms Based on Mobile Intel® 965 Express Chipset FamilyDatasheetJanuary 2008

Introduction10 Datasheet

Datasheet 11Low Power Features2 Low Power Features2.1 Clock Control and Low Power StatesThe processor supports low power states both at the individual

Low Power Features12 DatasheetFigure 1. Core Low Power States C2†C0StopGrantCore statebreakP_LVL2 orMWAIT(C2)C3†CorestatebreakP_LVL3 orMWAIT(C3)C1/M

Datasheet 13Low Power Features NOTES:1. AutoHALT or MWAIT/C1.2.1.1 Core Low Power State Descriptions2.1.1.1 Core C0 StateThis is the normal operating

Low Power Features14 DatasheetA System Management Interrupt (SMI) handler returns execution to either Normal state or the AutoHALT Powerdown state.

Datasheet 15Low Power Features2.1.2 Package Low Power State Descriptions2.1.2.1 Normal StateThis is the normal operating state for the processor. The

Low Power Features16 DatasheetIn the Sleep state, the processor is incapable of responding to snoop transactions or latching interrupt signals. No t

Datasheet 17Low Power FeaturesExit from Deeper Sleep or Intel Enhanced Deeper Sleep state is initiated by DPRSTP# deassertion when either core request

Low Power Features18 Datasheet2.2 Enhanced Intel SpeedStep® TechnologyThe processor features Enhanced Intel SpeedStep Technology. Following are the

Datasheet 19Low Power Features2.2.1 Dynamic FSB Frequency SwitchingDynamic FSB frequency switching effectively reduces the internal bus clock frequenc

2 DatasheetLegal Lines and DisclaimersINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY

Low Power Features20 DatasheetThe processor implements two software interfaces for requesting extended package low power states: MWAIT instruction e

Datasheet 21Low Power Featuresconsumption allows for leakage current reduction, which results in platform power savings and extended battery life. The

Low Power Features22 Datasheet

Datasheet 23Electrical Specifications3 Electrical Specifications3.1 Power and Ground PinsFor clean, on-chip power distribution, the processor has a la

Electrical Specifications24 Datasheet0 0 1 0 1 1 0 1.22500 0 1 0 1 1 1 1.21250 0 1 1 0 0 0 1.20000 0 1 1 0 0 1 1.18750 0 1 1 0 1 0 1.17500 0 1 1 0 1 1

Datasheet 25Electrical Specifications1 0 0 0 1 0 1 0.63751 0 0 0 1 1 0 0.62501 0 0 0 1 1 1 0.61251 0 0 1 0 0 0 0.60001 0 0 1 0 0 1 0.58751 0 0 1 0 1 0

Electrical Specifications26 Datasheet3.4 Catastrophic Thermal ProtectionThe processor supports the THERMTRIP# signal for catastrophic thermal protecti

Datasheet 27Electrical Specifications3.6 FSB Frequency Select Signals (BSEL[2:0]) The BSEL[2:0] signals are used to select the frequency of the proces

Electrical Specifications28 DatasheetNOTES:1. Refer to Chapter 4 for signal descriptions and termination requirements.2. In processor systems where th

Datasheet 29Electrical Specifications3.8 CMOS SignalsCMOS input signals are shown in Table 4. Legacy output FERR#, IERR# and other non-AGTL+ signals (

Datasheet 3Contents1Introduction...71.1 Ter

Electrical Specifications30 Datasheet3.10 Processor DC SpecificationsThe processor DC specifications in this section are defined at the processor core

Datasheet 31Electrical SpecificationsNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at ma

Electrical Specifications32 DatasheetNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at ma

Datasheet 33Electrical Specifications2. The voltage specifications are assumed to be measured across VCC_SENSE and VSS_SENSE pins at socket with a 100

Electrical Specifications34 DatasheetNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at ma

Datasheet 35Electrical SpecificationsNOTES:1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at ma

Electrical Specifications36 DatasheetFigure 3. Active VCC and ICC Loadline Intel Core 2 Duo Processors - Standard Voltage, Low Voltage and Ultra Low V

Datasheet 37Electrical SpecificationsNOTE: Deeper Sleep mode tolerance depends on VID value.Figure 4. Deeper Sleep VCC and ICC Loadline Intel Core 2 D

Electrical Specifications38 DatasheetNOTE: Deeper Sleep mode tolerance depends on VID value.NOTES:1. Unless otherwise noted, all specifications in thi

Datasheet 39Electrical SpecificationsNOTES:1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.2. VIL is de

4 DatasheetFigures1 Core Low Power States...122 Package Low

Electrical Specifications40 DatasheetNOTES:1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.2. The VCCP

Datasheet 41Package Mechanical Specifications and Pin Information4 Package Mechanical Specifications and Pin Information4.1 Package Mechanical Specifi

Package Mechanical Specifications and Pin Information42 DatasheetFigure 6. 4-MB and Fused 2-MB Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) h

Datasheet 43Package Mechanical Specifications and Pin InformationFigure 7. 4-MB and Fused 2-MB Micro-FCPGA Processor Package Drawing (Sheet 2 of 2)

Package Mechanical Specifications and Pin Information44 DatasheetFigure 8. 2-MB Micro-FCPGA Processor Package Drawing (Sheet 1 of 2)

Datasheet 45Package Mechanical Specifications and Pin InformationFigure 9. 2-MB Micro-FCPGA Processor Package Drawing (Sheet 2 of 2)

Package Mechanical Specifications and Pin Information46 DatasheetFigure 10. 4-MB and Fused 2-MB Micro-FCBGA Processor Package Drawing (Sheet 1 of 2)

Datasheet 47Package Mechanical Specifications and Pin InformationFigure 11. 4-MB and Fused 2-MB Micro-FCBGA Processor Package Drawing (Sheet 2 of 2)

Package Mechanical Specifications and Pin Information48 Datasheet Figure 12. 2-MB Micro-FCBGA Processor Package Drawing (Sheet 1 of 2)

Datasheet 49Package Mechanical Specifications and Pin Information4.2 Processor Pinout and Pin ListTable 14 shows the top view pinout of the Intel Core

Datasheet 5Revision HistoryDocument NumberRevision NumberDescription Date316745 -001 • Initial Release May 2007316745 -002• Updates— Chapter 1 added I

Package Mechanical Specifications and Pin Information50 DatasheetTable 14. The Coordinates of the Processor Pins as Viewed from the Top of the Package

Datasheet 51Package Mechanical Specifications and Pin InformationTable 15. The Coordinates of the Processor Pins as Viewed from the Top of the Package

Package Mechanical Specifications and Pin Information52 DatasheetThis page is intentionally left blank.

Datasheet 53Package Mechanical Specifications and Pin InformationTable 16. Pin Listing by Pin Name (Sheet 1 of 16)Pin NamePin NumberSignal Buffer T

Package Mechanical Specifications and Pin Information54 DatasheetBR0# F1 Common ClockInput/OutputBSEL[0] B22 CMOS OutputBSEL[1] B23 CMOS OutputBSEL[

Datasheet 55Package Mechanical Specifications and Pin InformationD[37]# T22 Source SynchInput/OutputD[38]# U25 Source SynchInput/OutputD[39]# U23 So

Package Mechanical Specifications and Pin Information56 DatasheetDSTBP[3]# AF24 Source SynchInput/OutputFERR# A5 Open Drain OutputGTLREF AD26 Power/

Datasheet 57Package Mechanical Specifications and Pin InformationVCC AA13 Power/OtherVCC AA15 Power/OtherVCC AA17 Power/OtherVCC AA18 Power/OtherVCC

Package Mechanical Specifications and Pin Information58 DatasheetVCC E12 Power/OtherVCC E13 Power/OtherVCC E15 Power/OtherVCC E17 Power/OtherVCC E18

Datasheet 59Package Mechanical Specifications and Pin InformationVSS AC14 Power/OtherVSS AC16 Power/OtherVSS AC19 Power/OtherVSS AC21 Power/OtherVSS

6 Datasheet

Package Mechanical Specifications and Pin Information60 DatasheetVSS F16 Power/OtherVSS F19 Power/OtherVSS F22 Power/OtherVSS F25 Power/OtherVSS G1

Datasheet 61Package Mechanical Specifications and Pin InformationVSS A8 Power/OtherVCC A9 Power/OtherVCC A10 Power/OtherVSS A11 Power/OtherVCC A12 P

Package Mechanical Specifications and Pin Information62 DatasheetD[51]# AB22 Source SynchInput/OutputVSS AB23 Power/OtherD[33]# AB24 Source SynchInp

Datasheet 63Package Mechanical Specifications and Pin InformationVID[2] AE5 CMOS OutputPSI# AE6 CMOS OutputVSSSENSE AE7 Power/Other OutputVSS AE8 Po

Package Mechanical Specifications and Pin Information64 DatasheetBSEL[0] B22 CMOS OutputBSEL[1] B23 CMOS OutputVSS B24 Power/OtherTHRMDC B25 Power/O

Datasheet 65Package Mechanical Specifications and Pin InformationVCC E12 Power/OtherVCC E13 Power/OtherVSS E14 Power/OtherVCC E15 Power/OtherVSS E16

Package Mechanical Specifications and Pin Information66 DatasheetVSS H6 Power/OtherVSS H21 Power/OtherD[12]# H22 Source SynchInput/OutputD[15]# H23

Datasheet 67Package Mechanical Specifications and Pin InformationDSTBP[1]# M26 Source SynchInput/OutputVSS N1 Power/OtherA[8]# N2 Source SynchInput/

Package Mechanical Specifications and Pin Information68 DatasheetA[18]# U5 Source SynchInput/OutputVSS U6 Power/OtherVSS U21 Power/OtherDINV[2]# U22

Datasheet 69Package Mechanical Specifications and Pin Information4.3 Alphabetical Signals ReferenceTable 18. Signal Description (Sheet 1 of 7)Name Ty

Datasheet 7Introduction1 Introduction The Intel® Core™2 Duo processor on 65-nm process technology is the next generation high-performance, low-power p

Package Mechanical Specifications and Pin Information70 DatasheetBSEL[2:0] OutputBSEL[2:0] (Bus Select) are used to select the processor input clock f

Datasheet 71Package Mechanical Specifications and Pin InformationDINV[3:0]#Input/OutputDINV[3:0]# (Data Bus Inversion) are source synchronous and indi

Package Mechanical Specifications and Pin Information72 DatasheetFERR#/PBE# OutputFERR# (Floating-point Error)/PBE#(Pending Break Event) is a multiple

Datasheet 73Package Mechanical Specifications and Pin InformationLINT[1:0] InputLINT[1:0] (Local APIC Interrupt) must connect the appropriate pins of

Package Mechanical Specifications and Pin Information74 DatasheetRESET# InputAsserting the RESET# signal resets the processor to a known state and inv

Datasheet 75Package Mechanical Specifications and Pin Information§ THERMTRIP# OutputThe processor protects itself from catastrophic overheating by use

Package Mechanical Specifications and Pin Information76 Datasheet

Datasheet 77Thermal Specifications and Design Considerations5 Thermal Specifications and Design ConsiderationsMaintaining the proper thermal environme

Thermal Specifications and Design Considerations78 Datasheet5. Processor TDP requirements in Intel Dynamic Acceleration Technology mode is lesser than

Datasheet 79Thermal Specifications and Design ConsiderationsNOTES:1. The TDP specification should be used to design the processor thermal solution. Th

Introduction8 Datasheet1.1 TerminologyTerm Definition#A “#” symbol after a signal name refers to an active low signal, indicating a signal is in the

Thermal Specifications and Design Considerations80 DatasheetNOTES:1. The TDP specification should be used to design the processor thermal solution. Th

Datasheet 81Thermal Specifications and Design Considerations5.1.1 Thermal DiodeThe processor incorporates an on-die PNP transistor whose base emitter

Thermal Specifications and Design Considerations82 DatasheetNOTES:1. Intel does not support or recommend operation of the thermal diode under reverse

Datasheet 83Thermal Specifications and Design ConsiderationsNOTES:1. Intel does not support or recommend operation of the thermal diode under reverse

Thermal Specifications and Design Considerations84 DatasheetIf the ntrim value used to calculate the Toffset differs from the ntrim value used to in a

Datasheet 85Thermal Specifications and Design ConsiderationsEMTTM is a processor feature that enhances Intel Thermal Monitor 2 with a processor thrott

Thermal Specifications and Design Considerations86 Datasheetjunction temperature within the maximum specification, the system must initiate an orderly

Datasheet 87Thermal Specifications and Design Considerations5.1.5 Out of Specification DetectionOverheat detection is performed by monitoring the proc

Datasheet 9Introduction1.2 ReferencesMaterial and concepts available in the following documents may be beneficial when reading this document. NOTES:1.